Short courses of the 20th Regional School of High Performance Computing from Southern Brazil

Authors

André Du Bois (ed)
UFPel
Márcio Castro (ed)
UFSC

Keywords:

Computational experiments, High performance computing, Performance analysis, OpenACC, Parallel programming, Accelerators, OpenMP, Hardware counters, Task-oriented paradigm, StarPU, Scientific applications, Embedded systems, Networks on chip, FPGA

Synopsis

This book presents textual versions, in the form of book chapters, of six short courses accepted and presented at the 20th Regional School of High Performance Computing from Southern Brazil (ERAD/RS). The mini-courses deal with technical aspects related to the following themes: parallel programming for multicore processors and accelerators, performance evaluation of parallel programs and chip networks in FPGAs. In the first chapter of this book, "Best Practices for High-Performance Computing Experiments", the authors present techniques and good practices for analyzing the performance of parallel applications for high-performance computing. In the second chapter, "Introduction to Programming with OpenACC", the authors offer an introduction to parallel programming with OpenACC through an expository approach, plus the use of examples with different architectures. In the third chapter, "Parallel Programming in Shared Memory and Performance Evaluation with Hardware Counters", the authors discuss the parallel and vector programming paradigms, as well as some basic possibilities for application optimization in current architectures and performance analysis through hardware counters. In the fourth chapter, "Introduction to the Development of Parallel Applications with the Task-Oriented Paradigm and the StarPU Runtime", the authors deal with the task-oriented paradigm and how to build parallel programs for systems with heterogeneous physical resources using the StarPU runtime. In the fifth chapter, "Programming Applications with Parallel Directives", the authors present techniques for exploring parallelism in different code snippets of scientific applications through the use of OpenMP and OpenACC programming interfaces. Finally, in the sixth chapter, "Study of Networks on Chip (NoCs) in FPGAs", the authors present the basic concepts related to NoCs together with a discussion of the use of NoCs in reconfigurable devices (FPGAs).

 

Chapters

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Publication date

April 14, 2020

Details about the available publication format: Full Volume

Full Volume

Co-publisher's ISBN-13 (24)

978-65-87003-00-9